1. Field of the Invention
The present invention generally relates to chip package designs and more particularly to an improved design that pre-assigns the contact pad array pattern and associated net list for a family of chips.
2. Description of the Related Art
Semiconductor chips are generally encased in packages that are attached to a printed circuit board. The packages protect the chip from environmental degradation and form electrical power and signal connections to the printed circuit board. The chips generally perform different functions some of which are less complex than others. Therefore, the chips often have different sizes (sometimes relating to their complexity).
One problem encountered by designers is that each chip package (substrate) must be uniquely designed for each newly designed chip. This is true for even those chips that are in the same family (same family corresponding to the same technology node and device type, and sometimes extending to the same topology and/or I/O structure and pinout). The invention described below overcomes such problems by utilizing pre-assigned pin-out patterns on the chip packages.